1. Field of the Invention
The present invention relates to testing electronics.
2. Description of the Related Art
With the scaling, increase in density and mass production of integrated circuits, appropriate testing has become a more important part of the design and development process. The design process has several steps. With each step of the design process, there is a corresponding step or steps involved in testing and validating the system. Some of these testing steps are described below.
Early in the design process, an engineer will perform behavioral simulations. This process involves writing models of the components in a descriptive behavioral language (e.g., C, Verilog, VHDL, etc.), writing stimulus and monitoring the components to validate correct operation. After behavioral simulations, logic gates will be synthesized and the same (or different) tests can be performed on the gate level netlists. One advantage of testing at behavioral and gate levels is that the designer has complete visibility to components in the system. However, current tools do not correctly model metastability when latching an asynchronous signal with a clock. Additionally, timing is usually turned off to speed up the simulation. For example, timing may be verified through other tools. Such behavioral and gate level simulations can also be very slow, which limits the amount of tests that can be run and usually prevents real software from being used to test the design. As such, tests at the gate level simulation and behavioral simulation tend to not test real world behavior.
Subsequent to gate level simulations, a designer may perform chip emulation, which includes mapping the design to programmable logic devices that allow for faster simulation. One advantage is that more tests and longer tests can be run, the tests are run on real hardware, and asynchronous clock boundaries can be tested. Additionally, software can be used to test the system. However, the programmable logic devices do not necessarily match the final circuit implementation; therefore, the test may not be a real world test of the final product. Additionally, the designer does not have full visibility of the many components in the design.
Once a chip is fabricated it can be tested on a chip tester that has control over the pins of a chip. Test vectors are created (manually or via software) to validate the correct fabrication of the chip. On one hand, such chip testing is testing the real silicon to be used. Therefore, the testing can be very accurate. On the other hand, not all the functions of the chip can be tested and there is a limitation on how much time the tester can devote to testing a particular chip. Additionally, chip testing usually does not validate asynchronous clock boundaries. In many cases, tests are usually not running with full speed clocks.
Subsequent to chip testing, a designer may perform a system test. That is, the chip and other components are placed in the system. For example, components may be mounted on a printed circuit board. Software tests can be run on the real system. Therefore, a full test sweep is possible on the actual product. However, there is limited test time on the manufacturing tester. That limited test time is usually devoted to validating that the system was fabricated correctly and is not necessarily used to validate correct functionality for all aspects of the design. With audio and video applications, usually only analog outputs are available to the external tester. Therefore, very expensive external test apparatus are required to capture the output, digitize it and validate proper system behavior. When errors occur, fault isolation can be problematic.
After the system is built, software can be run on the system. This includes a series of tests to validate the proper functionality of the system. Usually, such software tests are run on corner lots of the silicon and system, assuming that any fabrication errors are caught by the chip and system testers. The advantage of such software tests is that they test the actual product that consumers will receive. However, there is not enough visibility to the hardware to determine where problems are occurring, and validating that the test ran correctly is usually done by a human operator which can be a source of error.
After a system is provided to a user, many systems will include power-on self tests. That is, when a consumer turns on the machine, some manner of basic error checking is performed to validate the proper operation of the system. These tests are not complete and they typically only provide a basic go/no-go status which is used to either continue the boot process or halt with an error message of some sort (e.g., “please contact #”).
To increase the reliability of electronic devices, a testing scheme is needed that satisfies the concerns described above. Additionally, it is desired to have a testing scheme that provides for long running tests without requiring close monitoring of a large amount of intermediate results. Having to monitor an unreasonably large amount of intermediate results uses CPU cycles, requires resources to store the results, and requires resources to monitor and review the results.